54F189 memory equivalent, 64-bit random access memory.
Y TRI-STATE outputs for data bus applications Y Buffered inputs minimize loading Y Address decoding on-chip Y Diode clamped inputs minimize ringing Y Available in SOIC (3.
Y Buffered inputs minimize loading Y Address decoding on-chip Y Diode clamped inputs minimize ringing Y Available in SOI.
The ’F189 is a high-speed 64-bit RAM organized as a 16word by 4-bit array Address inputs are buffered to minimize loading and are fully decoded on-chip The outputs are TRISTATE and are in the high impedance state whenever the Chip Select (CS) input i.
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